S 10"


Fig. 20.11. Room temperature current-voltage I-V characteristics of C^/p-Si and C60/n-Si junctions with the filled squares for negative bias voltage and open squares for positive V. The complementary behavior between the junctions with n-Si and p-Si further supports the interpretation that it is the C^-Si interfaces which yield efficient rectification and diode behavior in (Nb or Ti)/C60/Si heterostructures. The insets, showing Arrhenius plots for each junction, yield activation energies (interpreted as barrier heights) of 0.30 eV for C^/n-Si and 0.48 eV for CJp-Si [20.57].

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