Onchip cooling by superlatticebased thinfilm thermoelectrics

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Ihtesham Chowdhury1, Ravi Prasher12*, Kelly Lofgreen1, Gregory Chrysler1', Sridhar Narasimhan1, Ravi Mahajan1, David Koester3, Randall Alley3 and Rama Venkatasubramanian4*

There is a significant need for site-specific and on-demand cooling in electronic1,2, optoelectronic3 and bioanalytical4 devices, where cooling is currently achieved by the use of bulky and/or over-designed system-level solutions. Thermoelectric devices can address these limitations while also enabling energy-efficient solutions, and significant progress has been made in the development of nanostructured thermoelectric materials with enhanced figures-of-merit5"10.However, fullyfunc-tional practical thermoelectric coolers have not been made from these nanomaterials due to the enormous difficulties in integrating nanoscale materials into microscale devices and packaged macroscale systems. Here, we show the integration of thermoelectric coolers fabricated from nanostructured Bi2Te3-based thin-film superlattices into state-of-the-art electronic packages. We report cooling of as much as 15 °C at the targeted region on a silicon chip with a high (~1,300 W cm"2) heat flux. This is the first demonstration of viable chip-scale refrigeration technology and has the potential to enable a wide range of currently thermally limited applications.

Cooling of high heat fluxes is a crucial requirement for the effective functioning of myriad devices. For instance, heat generation from silicon microprocessors is highly non-uniform, both spatially and temporally, with localized high heat fluxes (>300 W cm-2 is possible) that vary with workload1'2. In general, lower temperatures can lead to significantly higher computing performance from an integrated circuit device. For example, transistor gate leakage current increases exponentially with temperature11, and reliability and performance requirements are also gated by thermal consider-ations12. Similarly, the performance of optoelectronic devices such as semiconductor lasers3 (where a heat flux of >1,000 W cm-2 is possible) and bioanalytical devices such as DNA micro-arrays4 are also highly temperature-dependent. Current cooling technologies based on conduction and convection can potentially cool high overall power levels by making use of either novel passive heat transport materials or advanced heat exchangers such as carbon nano-tubes13 and microchannels14, respectively. However, they cannot provide site-specific or on-demand localized cooling of high heat-flux regions, thus resulting in over-designed, inefficient and bulky thermal systems. This has huge implications, especially with the recent advent of massive data-centres15 where the cooling energy costs are comparable to or even higher than the cost of the computational equipment itself, primarily because the entire system is cooled down in bulk. However, if thermoelectric devices are used to provide targeted cooling of only the high heat-flux regions as and when needed, the energy consumption can be drastically reduced.

In spite of this promise, thermoelectric cooling of electronics has been severely limited by two factors—the low figure-of-merit (ZT) of traditional thermoelectric materials and the low heat-flux pumping capacity of conventional coolers due to the use of thick bulk materials. The maximum heat-flux pumping capability for a thermoelectric device is given by16

— -J {[0:5a2Tc20ld_side/p] — [k(Thot-side — Tcold-side)]}

where a is the Seebeck coefficient, p the electrical resistivity, k the thermal conductivity, I the thickness of the thermoelectric material, and T denotes the temperature. The equation shows that to achieve high qmax, a2/p should be large and k should be small. These requirements imply maximization of ZT (~a2T/pk). Another requirement for high qmax is that I should be as small as possible. Using equation (1) and the properties of state-of-the-art thermoelectric materials, it can be shown that to achieve qmax > 500 W cm-2, the thickness I has to be less than 50 mm, which is not possible if bulk thermoelectric materials are used. Also, the total device thickness including the electrical contacts has to be of the order of 100 mm or less to meet electronic package volume constraints.

Significant progress has been made in recent years in increasing ZT by using nanostructured materials such as phonon-blocking/electron-transmitting thin-film superlattices6-8, thick films of quantum-dot superlattices9 and nanoscale inclusions in bulk material10. Several thermoelectric strategies that have been proposed for hotspot cooling are summarized in the Supplementary Information, Table S1. It can be seen that only nanostructured thin-film superlattice devices have the ability to remove very high localized heat fluxes. However, results on silicon/germanium superlattice thermoelectric coolers integrated on the backside of the chip show a dramatic degradation in performance8 when compared to the thermoelectric element-level performance, primarily due to low ZT (~0.1), back-conduction of heat, and contact parasitics due to electrical and thermal contact resistances. The impact of contact parasitics is more dramatic for thin thermoelectric devices as the magnitude of the contact resistances becomes comparable to the values of the resistance due to the thermoelectric material itself. Another challenge is to combine multiple p-n couples made from these nanostructured materials to make a chip-scale device that can handle high absolute heat pumping requirements. In this paper we present a significant advance in solid-state refrigeration for chip-scale electronics cooling where we have overcome the above challenges by using thin (~100 mm total thickness)

11ntel Corporation, Chandler, Arizona 85226, USA, 2Department of Mechanical and Aerospace Engineering, Arizona State University, Tempe, Arizona 85287, USA, 3Nextreme Thermal Solutions Inc., Durham, North Carolina 27703, USA, 4RTI International, Research Triangle Park, North Carolina 27709, USA;

''Present address: NMB Technologies Corporation, Tempe, Arizona 85283, USA; *e-mail: [email protected]; [email protected]

LETTERS NATURE NANOTECHNOLOGY doi: 10.1038/nnano.2008.417

b Integrated heat spreader

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