Beyond CMOS Technology Sequence

As already mentioned, guessing beyond CMOS would be like playing roulette at your favorite casino. Figure 10.3 shows a possible roadmap that includes alternative materials such as III—V semiconductors and new nanostructures such as carbon nanotubes. However, organized work has begun in surveying the landscape beyond CMOS. Some of the great minds in this area are collaborating with the SRC as part of a task force working on emerging research devices. They have composed a taxonomy of emerging technology sequence published in the ITRS [2], which has been referenced and elaborated in various publications [5,18,35-40]. Figure 10.4 has been reproduced from the ITRS, which gives a clear snapshot of alternatives beyond CMOS with various degrees that includes new devices, architectures, and state variables.

Devices: The device is the lowest level physical entity in an information processing system. It has the ability to switch a state variable by an external stimulus or by intrinsic/extrinsic rules, conditions, and characteristics. Our common, three-terminal field effect transistor (FET) relies on gate-to-control electron flow. Other devices such as two-terminal molecular switches [41] make use of bistable states, and two-terminal resonant tunneling diodes make use of nonlinear characteristics [42,43]. Other emerging devices include spintronic, CNT-based FETs, mechanical, molecular, phase change, and quantum properties.

Architectures: The Von Neumann architecture is employed in today's microprocessors and controllers that represent information in Boolean form. Address, data, and control are the three most important elements required for this architecture. Other architectures that support emerging devices have also been proposed, such as Crossbar, Neuromorphic Networks, Cellular Nonlinear Networks, Cellular Automata, and Quantum Cellular Automata.

state Variables: State variables refer to information representation. Today, electron charge is the primary state variable used (it exhibits voltage, current, and capacitance); other information processing regimes may take advantage of electron spin, molecular state, photon intensity or polarization, quantum state, phase state, or mechanical state.

Traditional solid-state electronics may soon be taken over by these new foreseeable alternatives beyond CMOS. Quantum mechanics, nanoscale forces, new materials, new assembly and fabrication techniques

A taxonomy for nano-information processing

Hierarchy

A taxonomy for nano-information processing

Hierarchy

FIGURE 10.4 The ITRS 2004 Emerging Technology Sequence showing alternatives in architectures, logic devices, memory devices, and nonclassical CMOS designs. (From ITRS 2005 ed. With permission.)

and a new understanding of the meaning of information will be required to progress into a new paradigm that would offer advantages beyond CMOS. However, "there's plenty of room at the bottom"[44] and one thing is clear: smaller is better. Smaller enables the aforementioned state variables to be manipulated and allow for greater functionality. Given the case, the next question is: How does one build these new nanostructures, nanodevices, and nanoarchitectures?

10.3 Fabrication of Nanostructures

Other than conceptualizing a new device based on some new state variable, device and circuit fabrication is key in ensuring economic and scaling feasibility. This section will review the current lithography process and explore alternatives for nanoelectronics.

10.3.1 Progress in Lithography Process

Lithography was the key technology that propelled CMOS scaling for generations. Each new generation of lithography tools become more and more sophisticated and exponentially costly. One of the core elements of lithography is the wavelength of the light exposure. A shorter wavelength allows for smaller feature sizes; however, doing so challenges the performance of the light source and optics and further increases cost. The most advanced systems in development today are termed "extreme ultraviolet" (EUV). EUV operates at a wavelength of 193 nm, capable of producing structures down to 13.5 nm. This is great for achieving high resolution, although there are many technical difficulties. EUV is absorbed by lens material such as glass, so instead of lenses, mirrors must be used. Similarly, EUV will not pass through a glass mask, so a reflective mask is required (one that reflects the EUV in certain regions, to transfer the pattern onto the wafer). The reflective mask consists of a mirror consisting of 80 alternating layers of silicon and molybdenum, to maximize reflectivity. Production of EUV is not used for mass manufacture today. Tools such as Intel's EUV microexposure tool (MET), shown in Figure 10.5, are currently being

FIGURE 10.5 Lithography at its extreme. The EUV MET is used by Intel to develop its EUV technology for future device nodes. (Courtesy of the Intel Corporation.)

used to debug the technology for a new generation of steppers. The MET currently only prints 600 X 600 |im (less than 1 mm on a side), whereas a full die might be over 20 mm on a side.

Another key advance in lithography that is being pursued by equipment and optics manufacturers such as Applied Materials, Nikon, and Canon is water immersion lithography. This is a new approach for optical patterning that injects a liquid (with an index of reflection, n) between an exposure tool's projection lens and a wafer to achieve a better depth of focus and resolution over conventional lithography. In immersion lithography, a liquid is interposed between an exposure tool's projection lens and a wafer. Immersion technology offers better resolution enhancement over conventional projection lithography because the lens can be designed with a numerical aperture (NA) greater than one. This increases the ability to produce smaller images as shown by:

CD (resolution) = k1 (process factor) X A(wavelength)/NA

and,

NA = n (refraction index) X sin 6 (the maximum incident angle of the exposure light)

If the refraction index is greater than one (the value for air), such as ultrapure water (n = 1.44), light at the same angle will have an NA 1.44 times that of air. Normally, the semiconductor exposure equipment's projection lens and wafer are separated by air. However, if the gap is filled with ultrapure water to perform "immersed exposure," the equivalent wavelength will be 134 nm. This occurs even when using an excimer laser with a wavelength of 193 nm, which is expected to support printing down to 45 nm [45].

In addition to EUV and water immersion, other techniques such as phase-shift masking, modified illumination, optical proximity correction, and pupil filtering will assist in further driving optical lithography below the 65 nm node.

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