Figure I21

A plot illustrating the systematic decrease in feature size for transistor components, shown for both Intel products and data reported by the International Roadmap for Semiconductors (ITRS).

accordance with a predetermined pattern."44 In addition, the semiconductor chip product must be "intended to perform electronic circuitry functions."45

With these restrictions, there are certain nanotechnology products that clearly fall within the scope of the Semiconductor Chip Protection Act. As miniaturization of integrated circuits has continued, the feature sizes of the components have shrunk to the nanometer scale (see Figure I.21). It is becoming common to see reports of feature sizes in integrated circuits on the order of 100 nm, bringing integrated circuits themselves within the scope of nanotechnology. The term "feature size " is used in characterizing integrated circuits and defines the scale at which the smallest feature can be produced in a fabrication. The term is relatively generic since a "feature" could be a wire, a transistor, or some other component.

Application of mask-work statutes to integrated circuit technology, including at the nanometer scale, is straightforward because those statutes were originally conceived with integrated circuits in mind. While the nanometer scale is being reached in conventional integrated circuits, some have speculated that further decreases in size will be more difficult to achieve. The concern is that feature sizes are now about the same order in magnitude as the wavelength of light used in photolithographic processes so that further attempts to reduce the feature size will encounter limitations dictated by the laws of physics.

The answers proposed for addressing these limitations inevitably turn to the structures that are the bread and butter of much nanotechnology research: nanotubes. One proposal is to develop electronic devices that make use of the conductive properties of carbon nanotubes. One way of affecting these conductive properties is to introduce a twist into the nanotube so that it has semiconducting properties instead of purely conducting properties (Figure I.22).

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